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Pull requests: intel/intel-xpu-backend-for-triton

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Pull requests list

Remove advanced path
#5205 opened Sep 26, 2025 by whitneywhtsang Loading…
1
@whitneywhtsang
1
Update LTS skiplists after upgrade to LTS2
#5204 opened Sep 26, 2025 by anmyachev • Draft
[Draft] Add a new stage to generate zebin to align CUDA stages in triton.compile
#5189 opened Sep 25, 2025 by chengjunlu Loading…
1
9
Modify 'getConvertBackwardSlice' to propagate layout through scf::ForOp results
#5186 opened Sep 24, 2025 by etiotto • Draft
@etiotto
5
Enable bfloat16 unit tests
#5163 opened Sep 23, 2025 by whitneywhtsang Loading…
1
@whitneywhtsang
3
Enable triton kernels matmul tests
#5128 opened Sep 17, 2025 by wdziurdz • Draft
1
Update PyTorch pin and torch-xpu-ops pin
#5121 opened Sep 16, 2025 by anmyachev • Draft
WIP: Generate FMA loop
#5097 opened Sep 12, 2025 by etiotto • Draft
@etiotto
7
[DEBUG] Improve handling ZE_RESULT_ERROR_INVALID_KERNEL_NAME errors
#5090 opened Sep 12, 2025 by anmyachev • Draft
1
Bump actions/setup-python from 5 to 6 dependencies Pull requests that update a dependency file github_actions Pull requests that update GitHub Actions code
#5063 opened Sep 8, 2025 by dependabot bot Loading…
3
Remove intel-pti==0.12.4 pin since we switched to DLE 2025.2
#5015 opened Sep 2, 2025 by anmyachev • Draft
3
Test 24.04 + DLE 2025.2.1
#4981 opened Aug 28, 2025 by kwasd • Draft
Bump actions/checkout from 4 to 5 dependencies Pull requests that update a dependency file github_actions Pull requests that update GitHub Actions code
#4882 opened Aug 11, 2025 by dependabot bot Loading…
1
[Draft] Transpose 2d load.
#4870 opened Aug 11, 2025 by chengjunlu Loading…
1
9
[Draft] Support the globaltimer and smid on Intel Arch
#4816 opened Jul 31, 2025 by chengjunlu • Draft
4
A tracking utility for gathering the compile and/or runtime time, size, profiling and other statistics
#4777 opened Jul 25, 2025 by AndreyPavlenko Loading…
1
43
remove memory type check
#4767 opened Jul 23, 2025 by mayuyuace Loading…
3
[LoadStoreToLLVM] Refactor the 2D block load lowering.
#4615 opened Jul 4, 2025 by chengjunlu Loading…
1
9
[DRAFT] Subgroup 2D Block IO lowering example for AxB GEMM
#4608 opened Jul 2, 2025 by alexbaden • Draft
Store transpose attribute in Subgroup2DBlockIO layouts
#4549 opened Jun 20, 2025 by alexbaden • Draft
1
[Draft] [BACKEND] Enhance the remove layout implementation to reduce the duplicated values with different layout in scf.for.
#4527 opened Jun 18, 2025 by chengjunlu • Draft
2
11
Use the Subgroup 2D Block Encoding in LoadStoreOpToLLVM
#4500 opened Jun 13, 2025 by alexbaden • Draft
1
1
Clean up Intel specific code in the common TritonGPU dialect source file. upstream: triton
#4469 opened Jun 10, 2025 by chengjunlu • Draft
1
@chengjunlu
5
Convert block ptr type layouts to Subgroup2DBlockEncoding layouts
#4463 opened Jun 9, 2025 by alexbaden • Draft
1
68
Use inline VISA to optimize horizontal batched subgroup reduce
#4171 opened May 12, 2025 by chengjunlu • Draft
1
10
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