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@broxigarchen broxigarchen commented Sep 29, 2025

In true16 mode isel put 16bit in both vgpr16 and sreg32. Thus si-fix-sgpr-copies needs to legalize register-size-mismatched insts in the moveToVALU lowering process

For special inst, previously we legalized:

1. sreg_32 = copy vgpr_16
2. sgpr_lo16 = copy vgpr_32

with patch #144819, case2 is removed.

This patch removes case2 support, and added the missing subreg cases:

copy :
1. sreg_32 = copy .lo16:vgpr_32
2. sreg_32 = copy .hi16:vgpr_32

reg_sequence
vgpr_32 = reg_sequence(sreg32, lo16/hi16, ...)

This is a follow up of #160891

@broxigarchen broxigarchen changed the title addtional case for mismatched size copy [AMDGPU][True16][CodeGen] si-fix-sgpr-copies legalize copy with mismatched size with subreg case Sep 29, 2025
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github-actions bot commented Sep 29, 2025

✅ With the latest revision this PR passed the C/C++ code formatter.

@broxigarchen broxigarchen changed the title [AMDGPU][True16][CodeGen] si-fix-sgpr-copies legalize copy with mismatched size with subreg case [AMDGPU][True16][CodeGen] si-fix-sgpr-copies legalize size mismatched V2S copy with subreg case Sep 29, 2025
@broxigarchen broxigarchen force-pushed the main-fix-sgpr-copy-2 branch 3 times, most recently from cd3fc90 to b21f82c Compare October 2, 2025 13:39
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