Add barrier instructions DMB, DSB, ISB #38
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Thank you, @adamgreig. @homunkulus r+ |
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📌 Commit c4d897e has been approved by |
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adamgreig
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Jan 12, 2022
Don't include lang_items when in test mode.
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These instructions (A6.7.21-24 in ARMv6-M reference and A7.7.32-36 in ARMv7-M reference) allow explicit instruction and memory synchronisation. They're necessary for dealing with caches in Cortex-M7 parts and for various DMA operations on other parts.
Since they exist in both ARMv6-M and ARMv7-M I've added them as
#[cfg(target_arch="arm")]but maybe there's a better cfg flag?The argument
0xFis the only permitted encoding. They are all marked volatile and as clobbering memory in the CMSIS C implementation.