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MrSidimsMrSidims
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Rename ConvertFToTF32INTEL to RoundFToTF32INTEL (KhronosGroup#1913)
Extension name will be preserved for a while for binary compatibility. Signed-off-by: Sidorov, Dmitry <[email protected]>
1 parent 09a2f46 commit f9176f7

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6 files changed

+29
-25
lines changed

6 files changed

+29
-25
lines changed

‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ EXT(SPV_INTEL_memory_access_aliasing)
4040
EXT(SPV_INTEL_split_barrier)
4141
EXT(SPV_INTEL_bfloat16_conversion)
4242
EXT(SPV_INTEL_masked_gather_scatter)
43-
EXT(SPV_INTEL_tensor_float32_conversion)
43+
EXT(SPV_INTEL_tensor_float32_conversion) // TODO: to remove old extension
44+
EXT(SPV_INTEL_tensor_float32_rounding)
4445
EXT(SPV_INTEL_hw_thread_queries)
4546
EXT(SPV_EXT_relaxed_printf_string_address_space)

‎lib/SPIRV/libSPIRV/SPIRVInstruction.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3517,13 +3517,13 @@ _SPIRV_OP(MaskedScatter, false, 5)
35173517
#undef _SPIRV_OP
35183518

35193519
template <Op OC>
3520-
class SPIRVTensorFloat32ConversionINTELInstBase : public SPIRVUnaryInst<OC> {
3520+
class SPIRVTensorFloat32RoundingINTELInstBase : public SPIRVUnaryInst<OC> {
35213521
protected:
35223522
SPIRVCapVec getRequiredCapability() const override {
3523-
return getVec(internal::CapabilityTensorFloat32ConversionINTEL);
3523+
return getVec(internal::CapabilityTensorFloat32RoundingINTEL);
35243524
}
35253525

3526-
llvm::Optional<ExtensionID> getRequiredExtension() const override {
3526+
std::optional<ExtensionID> getRequiredExtension() const override {
35273527
return ExtensionID::SPV_INTEL_tensor_float32_conversion;
35283528
}
35293529

@@ -3541,8 +3541,8 @@ class SPIRVTensorFloat32ConversionINTELInstBase : public SPIRVUnaryInst<OC> {
35413541
// because it may call a method of class Module that may modify LiteralMap
35423542
// of Module field. That modification is not impacting validate method for
35433543
// these instructions, so const_cast is safe here.
3544-
using SPVTF32ConvTy = SPIRVTensorFloat32ConversionINTELInstBase<OC>;
3545-
SPIRVValue *Input = const_cast<SPVTF32ConvTy *>(this)->getOperand(0);
3544+
using SPVTF32RoundTy = SPIRVTensorFloat32RoundingINTELInstBase<OC>;
3545+
SPIRVValue *Input = const_cast<SPVTF32RoundTy *>(this)->getOperand(0);
35463546

35473547
SPIRVType *InCompTy = Input->getType();
35483548
SPIRVWord InCompCount = 1;
@@ -3570,8 +3570,8 @@ class SPIRVTensorFloat32ConversionINTELInstBase : public SPIRVUnaryInst<OC> {
35703570
};
35713571

35723572
#define _SPIRV_OP(x) \
3573-
typedef SPIRVTensorFloat32ConversionINTELInstBase<internal::Op##x> SPIRV##x;
3574-
_SPIRV_OP(ConvertFToTF32INTEL)
3573+
typedef SPIRVTensorFloat32RoundingINTELInstBase<internal::Op##x> SPIRV##x;
3574+
_SPIRV_OP(RoundFToTF32INTEL)
35753575
#undef _SPIRV_OP
35763576
} // namespace SPIRV
35773577

‎lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -532,8 +532,8 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
532532
"MemoryAccessAliasingINTEL");
533533
add(internal::CapabilityBfloat16ConversionINTEL, "Bfloat16ConversionINTEL");
534534
add(internal::CapabilityMaskedGatherScatterINTEL, "MaskedGatherScatterINTEL");
535-
add(internal::CapabilityTensorFloat32ConversionINTEL,
536-
"TensorFloat32ConversionINTEL");
535+
add(internal::CapabilityTensorFloat32RoundingINTEL,
536+
"TensorFloat32RoundingINTEL");
537537
add(internal::CapabilityHWThreadQueryINTEL, "HWThreadQueryINTEL");
538538
}
539539
SPIRV_DEF_NAMEMAP(Capability, SPIRVCapabilityNameMap)

‎lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,4 +10,4 @@ _SPIRV_OP_INTERNAL(ConvertFToBF16INTEL, internal::OpConvertFToBF16INTEL)
1010
_SPIRV_OP_INTERNAL(ConvertBF16ToFINTEL, internal::OpConvertBF16ToFINTEL)
1111
_SPIRV_OP_INTERNAL(MaskedGatherINTEL, internal::OpMaskedGatherINTEL)
1212
_SPIRV_OP_INTERNAL(MaskedScatterINTEL, internal::OpMaskedScatterINTEL)
13-
_SPIRV_OP_INTERNAL(ConvertFToTF32INTEL, internal::ConvertFToTF32INTEL)
13+
_SPIRV_OP_INTERNAL(RoundFToTF32INTEL, internal::RoundFToTF32INTEL)

‎lib/SPIRV/libSPIRV/spirv_internal.hpp‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ enum InternalOp {
4242
IOpAliasScopeListDeclINTEL = 5913,
4343
IOpConvertFToBF16INTEL = 6116,
4444
IOpConvertBF16ToFINTEL = 6117,
45-
IOpConvertFToTF32INTEL = 6426,
45+
IOpRoundFToTF32INTEL = 6426,
4646
IOpMaskedGatherINTEL = 6428,
4747
IOpMaskedScatterINTEL = 6429,
4848
IOpPrev = OpMax - 2,
@@ -59,7 +59,7 @@ enum InternalCapability {
5959
ICapMemoryAccessAliasingINTEL = 5910,
6060
ICapOptNoneINTEL = 6094,
6161
ICapBfloat16ConversionINTEL = 6115,
62-
ICapabilityTensorFloat32ConversionINTEL = 6425,
62+
ICapabilityTensorFloat32RoundingINTEL = 6425,
6363
ICapabilityMaskedGatherScatterINTEL = 6427,
6464
ICapabilityHWThreadQueryINTEL = 6134,
6565
};
@@ -82,6 +82,9 @@ _SPIRV_OP(Op, MaskedScatterINTEL)
8282
_SPIRV_OP(Capability, TensorFloat32ConversionINTEL)
8383
_SPIRV_OP(Op, ConvertFToTF32INTEL)
8484

85+
_SPIRV_OP(Capability, TensorFloat32RoundingINTEL)
86+
_SPIRV_OP(Op, RoundFToTF32INTEL)
87+
8588
enum InternalBuiltIn {
8689
IBuiltInSubDeviceIDINTEL = 6135,
8790
IBuiltInGlobalHWThreadIDINTEL = 6136,

‎test/transcoding/SPV_INTEL_tensor_float32_conversion/convert_tensor_float32.ll‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
1414
target triple = "spir64-unknown-unknown"
1515

16-
; CHECK-SPIRV: Capability TensorFloat32ConversionINTEL
16+
; CHECK-SPIRV: Capability TensorFloat32RoundingINTEL
1717
; CHECK-SPIRV: Extension "SPV_INTEL_tensor_float32_conversion"
1818
; CHECK-SPIRV: TypeFloat [[#FP32Ty:]] 32
1919
; CHECK-SPIRV: TypeVector [[#FP32v8Ty:]] [[#FP32Ty]] 8
@@ -22,24 +22,24 @@ target triple = "spir64-unknown-unknown"
2222
; CHECK-SPIRV: FunctionParameter [[#FP32Ty]] [[FP32ValId:.*]]
2323
; CHECK-SPIRV: FunctionParameter [[#FP32v8Ty]] [[FP32v8ValId:.*]]
2424

25-
; CHECK-SPIRV: ConvertFToTF32INTEL [[#FP32Ty]] [[#]] [[FP32ValId]]
26-
; CHECK-SPIRV: ConvertFToTF32INTEL [[#FP32v8Ty]] [[#]] [[FP32v8ValId]]
27-
; CHECK-SPIRV: ConvertFToTF32INTEL [[#FP32Ty]] [[#]] [[#CONST]]
25+
; CHECK-SPIRV: RoundFToTF32INTEL [[#FP32Ty]] [[#]] [[FP32ValId]]
26+
; CHECK-SPIRV: RoundFToTF32INTEL [[#FP32v8Ty]] [[#]] [[FP32v8ValId]]
27+
; CHECK-SPIRV: RoundFToTF32INTEL [[#FP32Ty]] [[#]] [[#CONST]]
2828

29-
; CHECK-LLVM: call spir_func float @_Z27__spirv_ConvertFToTF32INTELf(float
30-
; CHECK-LLVM: call spir_func <8 x float> @_Z27__spirv_ConvertFToTF32INTELDv8_f(<8 x float>
31-
; CHECK-LLVM: call spir_func float @_Z27__spirv_ConvertFToTF32INTELf(float 1.000000e+00)
29+
; CHECK-LLVM: call spir_func float @_Z25__spirv_RoundFToTF32INTELf(float
30+
; CHECK-LLVM: call spir_func <8 x float> @_Z25__spirv_RoundFToTF32INTELDv8_f(<8 x float>
31+
; CHECK-LLVM: call spir_func float @_Z25__spirv_RoundFToTF32INTELf(float 1.000000e+00)
3232

3333
define spir_func void @_Z2opffv8(float %a, <8 x float> %in) {
34-
%1 = tail call spir_func float @_Z27__spirv_ConvertFToTF32INTELf(float %a)
35-
%2 = tail call spir_func <8 x float> @_Z27__spirv_ConvertFToTF32INTELDv8_f(<8 x float> %in)
36-
%3 = tail call spir_func float @_Z27__spirv_ConvertFToTF32INTELf(float 1.000000e+00)
34+
%1 = tail call spir_func float @_Z25__spirv_RoundFToTF32INTELf(float %a)
35+
%2 = tail call spir_func <8 x float> @_Z25__spirv_RoundFToTF32INTELDv8_f(<8 x float> %in)
36+
%3 = tail call spir_func float @_Z25__spirv_RoundFToTF32INTELf(float 1.000000e+00)
3737
ret void
3838
}
3939

40-
declare spir_func float @_Z27__spirv_ConvertFToTF32INTELf(float)
40+
declare spir_func float @_Z25__spirv_RoundFToTF32INTELf(float)
4141

42-
declare spir_func <8 x float> @_Z27__spirv_ConvertFToTF32INTELDv8_f(<8 x float>)
42+
declare spir_func <8 x float> @_Z25__spirv_RoundFToTF32INTELDv8_f(<8 x float>)
4343

4444
!opencl.spir.version = !{!0}
4545
!spirv.Source = !{!1}

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