|
17 | 17 | sr = SR74HC595_BITBANG(ser, srclk, rclk)
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18 | 18 |
|
19 | 19 | sr.clear() # raises RuntimeError because you haven't provide srclr pin
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20 |
| -sr.enable() # raises RuntimeError because you haven't provide oe pin |
| 20 | +sr.enable() # raises RuntimeError because you haven't provide oe pin |
21 | 21 |
|
22 | 22 | # reconstruct with all pins
|
23 |
| -oe = Pin(33, Pin.OUT, value=0) # low enables output |
24 |
| -srclr = Pin(32, Pin.OUT, value=1) # pulsing low clears data |
| 23 | +oe = Pin(33, Pin.OUT, value=0) # low enables output |
| 24 | +srclr = Pin(32, Pin.OUT, value=1) # pulsing low clears data |
25 | 25 |
|
26 | 26 | sr = SR74HC595_BITBANG(ser, srclk, rclk, srclr, oe)
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27 | 27 |
|
28 | 28 | sr.bit(1) # send high bit, do not latch yet
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29 | 29 | sr.bit(0) # send low bit, do not latch yet
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30 |
| -sr.latch() # latch outputs, outputs=0000_0010 |
| 30 | +sr.latch() # latch outputs, outputs=0000_0010 |
31 | 31 |
|
32 |
| -sr.bit(1, 1) # send high bit and latch, outputs=0000_0101 |
33 |
| -sr.bit(0, 1) # send low bit and latch, outputs=0000_1010 |
| 32 | +sr.bit(1, 1) # send high bit and latch, outputs=0000_0101 |
| 33 | +sr.bit(0, 1) # send low bit and latch, outputs=0000_1010 |
34 | 34 |
|
35 |
| -sr.bits(0xff, 4) # send 4 lowest bits of 0xff (sends 0x0f), outputs=1010_1111 |
| 35 | +sr.bits(0xFF, 4) # send 4 lowest bits of 0xff (sends 0x0f), outputs=1010_1111 |
36 | 36 |
|
37 |
| -sr.clear(0) # clear the memory but don't latch yet |
| 37 | +sr.clear(0) # clear the memory but don't latch yet |
38 | 38 | sr.latch() # next latch shows the outputs have been reset
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39 | 39 |
|
40 |
| -sr.bits(0b1010_1010, 8) # write some bits |
| 40 | +sr.bits(0b1010_1010, 8) # write some bits |
41 | 41 | sr.clear() # clear the memory and latch, outputs have been reset
|
42 | 42 |
|
43 | 43 | sr.enable() # outputs enabled
|
44 |
| -sr.enable(0) # outputs disabled |
| 44 | +sr.enable(0) # outputs disabled |
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