diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp
index c1fafd759b5ab..a8bb34f69c629 100644
--- a/llvm/lib/IR/Instruction.cpp
+++ b/llvm/lib/IR/Instruction.cpp
@@ -865,7 +865,7 @@ const char *Instruction::getOpcodeName(unsigned OpCode) {
 bool Instruction::hasSameSpecialState(const Instruction *I2,
                                       bool IgnoreAlignment,
                                       bool IntersectAttrs) const {
-  auto I1 = this;
+  const auto *I1 = this;
   assert(I1->getOpcode() == I2->getOpcode() &&
          "Can not compare special state of different instructions");
 
@@ -918,6 +918,8 @@ bool Instruction::hasSameSpecialState(const Instruction *I2,
            FI->getSyncScopeID() == cast<FenceInst>(I2)->getSyncScopeID();
   if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(I1))
     return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I2)->isVolatile() &&
+           (CXI->getAlign() == cast<AtomicCmpXchgInst>(I2)->getAlign() ||
+            IgnoreAlignment) &&
            CXI->isWeak() == cast<AtomicCmpXchgInst>(I2)->isWeak() &&
            CXI->getSuccessOrdering() ==
                cast<AtomicCmpXchgInst>(I2)->getSuccessOrdering() &&
@@ -928,6 +930,8 @@ bool Instruction::hasSameSpecialState(const Instruction *I2,
   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
     return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() &&
            RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() &&
+           (RMWI->getAlign() == cast<AtomicRMWInst>(I2)->getAlign() ||
+            IgnoreAlignment) &&
            RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() &&
            RMWI->getSyncScopeID() == cast<AtomicRMWInst>(I2)->getSyncScopeID();
   if (const ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I1))
diff --git a/llvm/test/Transforms/IROutliner/outlining-special-state.ll b/llvm/test/Transforms/IROutliner/outlining-special-state.ll
new file mode 100644
index 0000000000000..9ceec51895351
--- /dev/null
+++ b/llvm/test/Transforms/IROutliner/outlining-special-state.ll
@@ -0,0 +1,163 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
+; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
+
+declare void @foo();
+
+define void @atomicrmw_base(ptr %p) {
+entry:
+  %1 = atomicrmw add ptr %p, i32 1 acquire, align 8
+  call void @foo()
+  ret void
+}
+
+define void @atomicrmw_copy(ptr %p) {
+entry:
+  %1 = atomicrmw add ptr %p, i32 1 acquire, align 8
+  call void @foo()
+  ret void
+}
+
+define void @atomicrmw_wrong_type(ptr %p) {
+entry:
+  %1 = atomicrmw add ptr %p, i64 1 acquire, align 8
+  call void @foo()
+  ret void
+}
+
+define void @atomicrmw_wrong_align(ptr %p) {
+entry:
+  %1 = atomicrmw add ptr %p, i32 1 acquire, align 4
+  call void @foo()
+  ret void
+}
+
+define void @atomicrmw_wrong_volatile(ptr %p) {
+entry:
+  %1 = atomicrmw volatile add ptr %p, i32 1 acquire, align 8
+  call void @foo()
+  ret void
+}
+
+define void @cmpxchg_base(ptr %p) {
+entry:
+  %1 = cmpxchg ptr %p, i32 0, i32 1 monotonic monotonic, align 8
+  call void @foo()
+  ret void
+}
+
+define void @cmpxchg_copy(ptr %p) {
+entry:
+  %1 = cmpxchg ptr %p, i32 0, i32 1 monotonic monotonic, align 8
+  call void @foo()
+  ret void
+}
+
+define void @cmpxchg_wrong_type(ptr %p) {
+entry:
+  %1 = cmpxchg ptr %p, i64 0, i64 1 monotonic monotonic, align 8
+  call void @foo()
+  ret void
+}
+
+define void @cmpxchg_wrong_align(ptr %p) {
+entry:
+  %1 = cmpxchg ptr %p, i32 0, i32 1 monotonic monotonic, align 4
+  call void @foo()
+  ret void
+}
+
+define void @cmpxchg_wrong_volatile(ptr %p) {
+entry:
+  %1 = cmpxchg volatile ptr %p, i32 0, i32 1 monotonic monotonic, align 8
+  call void @foo()
+  ret void
+}
+
+
+; CHECK-LABEL: @atomicrmw_base(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    call void @outlined_ir_func_1(ptr [[P:%.*]])
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @atomicrmw_copy(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    call void @outlined_ir_func_1(ptr [[P:%.*]])
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @atomicrmw_wrong_type(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = atomicrmw add ptr [[P:%.*]], i64 1 acquire, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @atomicrmw_wrong_align(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = atomicrmw add ptr [[P:%.*]], i32 1 acquire, align 4
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @atomicrmw_wrong_volatile(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = atomicrmw volatile add ptr [[P:%.*]], i32 1 acquire, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @cmpxchg_base(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[P:%.*]])
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @cmpxchg_copy(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[P:%.*]])
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @cmpxchg_wrong_type(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = cmpxchg ptr [[P:%.*]], i64 0, i64 1 monotonic monotonic, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @cmpxchg_wrong_align(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = cmpxchg ptr [[P:%.*]], i32 0, i32 1 monotonic monotonic, align 4
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @cmpxchg_wrong_volatile(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = cmpxchg volatile ptr [[P:%.*]], i32 0, i32 1 monotonic monotonic, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @outlined_ir_func_0(
+; CHECK-NEXT:  newFuncRoot:
+; CHECK-NEXT:    br label [[ENTRY_TO_OUTLINE:%.*]]
+; CHECK:       entry_to_outline:
+; CHECK-NEXT:    [[TMP1:%.*]] = cmpxchg ptr [[TMP0:%.*]], i32 0, i32 1 monotonic monotonic, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    br label [[ENTRY_AFTER_OUTLINE_EXITSTUB:%.*]]
+; CHECK:       entry_after_outline.exitStub:
+; CHECK-NEXT:    ret void
+;
+;
+; CHECK-LABEL: @outlined_ir_func_1(
+; CHECK-NEXT:  newFuncRoot:
+; CHECK-NEXT:    br label [[ENTRY_TO_OUTLINE:%.*]]
+; CHECK:       entry_to_outline:
+; CHECK-NEXT:    [[TMP1:%.*]] = atomicrmw add ptr [[TMP0:%.*]], i32 1 acquire, align 8
+; CHECK-NEXT:    call void @foo()
+; CHECK-NEXT:    br label [[ENTRY_AFTER_OUTLINE_EXITSTUB:%.*]]
+; CHECK:       entry_after_outline.exitStub:
+; CHECK-NEXT:    ret void
+;
diff --git a/llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp b/llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
index 03009d53d63f4..fa451fab67549 100644
--- a/llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
+++ b/llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
@@ -49,6 +49,9 @@ void getSimilarities(
   SimilarityCandidates = Identifier.findSimilarity(M);
 }
 
+// TODO: All these tests could probably become IR LIT tests like
+// IROutliner/outlining-special-state.ll
+
 // Checks that different opcodes are mapped to different values
 TEST(IRInstructionMapper, OpcodeDifferentiation) {
   StringRef ModuleString = R"(