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junchao-loongsonankitm3k
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Fix LARCH64 compile error (microsoft#22759)
### Description Currently loongarch has not implemented AIsSigned qgemm, so I added bypass for it
1 parent fbb2201 commit 2e68d19

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3 files changed

+8
-3
lines changed

3 files changed

+8
-3
lines changed

onnxruntime/core/mlas/lib/qgemm.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -867,7 +867,7 @@ MlasGemmQuantGetDispatch(
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{
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const MLAS_GEMM_QUANT_DISPATCH* GemmQuantDispatch = &MlasGemmQuantDispatchDefault;
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870-
#if defined(MLAS_TARGET_AMD64_IX86) || defined(MLAS_TARGET_LARCH64)
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#if defined(MLAS_TARGET_AMD64_IX86)
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if (AIsSigned) {
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GemmQuantDispatch =
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BIsSigned ? GetMlasPlatform().GemmS8S8Dispatch : GetMlasPlatform().GemmS8U8Dispatch;
@@ -895,6 +895,11 @@ MlasGemmQuantGetDispatch(
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if (GetMlasPlatform().GemmU8X8Dispatch == &MlasGemm8X8DispatchPOWER10) {
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GemmQuantDispatch = GetMlasPlatform().GemmU8X8Dispatch;
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}
898+
#elif defined(MLAS_TARGET_LARCH64)
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if (!AIsSigned) {
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GemmQuantDispatch =
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BIsSigned ? GetMlasPlatform().GemmU8S8Dispatch : GetMlasPlatform().GemmU8U8Dispatch;
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}
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#endif
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if (nullptr == GemmQuantDispatch) {

onnxruntime/test/framework/allocator_test.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ TEST(AllocatorTest, CPUAllocatorTest) {
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EXPECT_EQ(cpu_arena->Info().id, 0);
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// arena is disabled for CPUExecutionProvider on x86 and JEMalloc
19-
#if (defined(__amd64__) || defined(_M_AMD64) || defined(__aarch64__) || defined(_M_ARM64)) && !defined(USE_JEMALLOC) && !defined(USE_MIMALLOC) && !defined(ABSL_HAVE_ADDRESS_SANITIZER)
19+
#if (defined(__amd64__) || defined(_M_AMD64) || defined(__aarch64__) || defined(__loongarch__) || defined(_M_ARM64)) && !defined(USE_JEMALLOC) && !defined(USE_MIMALLOC) && !defined(ABSL_HAVE_ADDRESS_SANITIZER)
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EXPECT_EQ(cpu_arena->Info().alloc_type, OrtAllocatorType::OrtArenaAllocator);
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#else
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EXPECT_EQ(cpu_arena->Info().alloc_type, OrtAllocatorType::OrtDeviceAllocator);

onnxruntime/test/framework/tensor_test.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ TEST(TensorTest, EmptyTensorTest) {
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EXPECT_EQ(location.id, 0);
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// arena is disabled for CPUExecutionProvider on x86 and JEMalloc
141-
#if (defined(__amd64__) || defined(_M_AMD64) || defined(__aarch64__) || defined(_M_ARM64)) && !defined(USE_JEMALLOC) && !defined(USE_MIMALLOC) && !defined(ABSL_HAVE_ADDRESS_SANITIZER)
141+
#if (defined(__amd64__) || defined(_M_AMD64) || defined(__aarch64__) || defined(__loongarch__) || defined(_M_ARM64)) && !defined(USE_JEMALLOC) && !defined(USE_MIMALLOC) && !defined(ABSL_HAVE_ADDRESS_SANITIZER)
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EXPECT_EQ(location.alloc_type, OrtAllocatorType::OrtArenaAllocator);
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#else
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EXPECT_EQ(location.alloc_type, OrtAllocatorType::OrtDeviceAllocator);

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