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rdeodharrdeodhar
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[SYCL] Test change.
Signed-off-by: rdeodhar <[email protected]>
2 parents b96e9b4 + 78a0b19 commit 3b1ba7c

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‎buildbot/dependency.conf‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
[VERSIONS]
2-
# https://github.com/intel/llvm/releases/download/2020-WW45/oclcpuexp-2020.11.11.0.04_rel.tar.gz
3-
ocl_cpu_rt_ver=2020.11.11.0.04
4-
# https://github.com/intel/llvm/releases/download/2020-WW45/win-oclcpuexp-2020.11.11.0.04_rel.zip
5-
ocl_cpu_rt_ver_win=2020.11.11.0.04
2+
# https://github.com/intel/llvm/releases/download/2021-WW10/oclcpuexp-2021.11.3.0.02_rel.tar.gz
3+
ocl_cpu_rt_ver=2021.11.3.0.02
4+
# https://github.com/intel/llvm/releases/download/2021-WW10/win-oclcpuexp-2021.11.3.0.02_rel.zip
5+
ocl_cpu_rt_ver_win=2021.11.3.0.02
66
# Same GPU driver supports Level Zero and OpenCL
77
# https://github.com/intel/compute-runtime/releases/tag/21.08.19096
88
ocl_gpu_rt_ver=21.08.19096
@@ -15,25 +15,25 @@ intel_sycl_ver=build
1515
# https://github.com/oneapi-src/oneTBB/blob/master/cmake/README.md
1616
# or downloaded using links below:
1717
# https://github.com/oneapi-src/oneTBB/releases/download/v2021.1.1/oneapi-tbb-2021.1.1-lin.tgz
18-
tbb_ver=2021.1.053
18+
tbb_ver=2021.2.0.236
1919
# https://github.com/oneapi-src/oneTBB/releases/download/v2021.1.1/oneapi-tbb-2021.1.1-win.zip
20-
tbb_ver_win=2021.1.049
20+
tbb_ver_win=2021.2.0.221
2121

22-
# https://github.com/intel/llvm/releases/download/2020-WW45/fpgaemu-2020.11.11.0.04_rel.tar.gz
23-
ocl_fpga_emu_ver=2020.11.11.0.04
24-
# https://github.com/intel/llvm/releases/download/2020-WW45/win-fpgaemu-2020.11.11.0.04_rel.zip
25-
ocl_fpga_emu_ver_win=2020.11.11.0.04
26-
fpga_ver=20201021_000005
27-
fpga_ver_win=20201022_000005
22+
# https://github.com/intel/llvm/releases/download/2021-WW10/fpgaemu-2021.11.3.0.02_rel.tar.gz
23+
ocl_fpga_emu_ver=2021.11.3.0.02
24+
# https://github.com/intel/llvm/releases/download/2021-WW10/win-fpgaemu-2021.11.3.0.02_rel.zip
25+
ocl_fpga_emu_ver_win=2021.11.3.0.02
26+
fpga_ver=20210205_000005
27+
fpga_ver_win=20210204_000003_signed_bom_fixed
2828
ocloc_ver_win=27.20.100.9168
2929

3030
[DRIVER VERSIONS]
31-
cpu_driver_lin=2020.11.11.0.04
32-
cpu_driver_win=2020.11.11.0.04
31+
cpu_driver_lin=2021.11.3.0.02
32+
cpu_driver_win=2021.11.3.0.02
3333
gpu_driver_lin=21.08.19096
3434
gpu_driver_win=27.20.100.9168
35-
fpga_driver_lin=2020.11.11.0.04
36-
fpga_driver_win=2020.11.11.0.04
35+
fpga_driver_lin=2021.11.3.0.02
36+
fpga_driver_win=2021.11.3.0.02
3737
# NVidia CUDA driver
3838
# TODO provide URL for CUDA driver
3939
nvidia_gpu_driver_lin=435.21

‎clang/include/clang/Basic/AttrDocs.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2421,8 +2421,8 @@ device kernel, the attribute is not ignored and it is propagated to the kernel.
24212421
If the`` intel::reqd_work_group_size`` or ``cl::reqd_work_group_size``
24222422
attribute is specified on a declaration along with a
24232423
intel::num_simd_work_items attribute, the work group size attribute
2424-
arguments must all be evenly divisible by the argument specified in
2425-
the ``intel::num_simd_work_items`` attribute.
2424+
argument (the first argument) must be evenly divisible by the argument specified
2425+
in the ``intel::num_simd_work_items`` attribute.
24262426

24272427
.. code-block:: c++
24282428

‎clang/include/clang/Driver/Options.td‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4296,7 +4296,10 @@ def sycl_std_EQ : Joined<["-"], "sycl-std=">, Group<sycl_Group>, Flags<[CC1Optio
42964296
HelpText<"SYCL language standard to compile for.">, Values<"2020,2017,121,1.2.1,sycl-1.2.1">,
42974297
NormalizedValues<["SYCL_2020", "SYCL_2017", "SYCL_2017", "SYCL_2017", "SYCL_2017"]>, NormalizedValuesScope<"LangOptions">,
42984298
MarshallingInfoString<LangOpts<"SYCLVersion">, "SYCL_None">, ShouldParseIf<fsycl.KeyPath>, AutoNormalizeEnum;
4299-
defm sycl_esimd: OptInFFlag<"sycl-explicit-simd", "Enable", "Disable", " SYCL explicit SIMD extension.", [CC1Option,CoreOption], LangOpts<"SYCLExplicitSIMD">>;
4299+
defm sycl_esimd: BoolFOption<"sycl-explicit-simd",
4300+
LangOpts<"SYCLExplicitSIMD">, DefaultFalse,
4301+
PosFlag<SetTrue, [CC1Option], "Enable">, NegFlag<SetFalse, [], "Disable">,
4302+
BothFlags<[NoArgumentUnused, CoreOption], " SYCL explicit SIMD extension.">>;
43004303
defm sycl_early_optimizations : OptOutFFlag<"sycl-early-optimizations", "Enable", "Disable", " standard optimization pipeline for SYCL device compiler", [CoreOption]>;
43014304
def fsycl_dead_args_optimization : Flag<["-"], "fsycl-dead-args-optimization">,
43024305
Group<sycl_Group>, Flags<[NoArgumentUnused, CoreOption]>, HelpText<"Enables "

‎clang/include/clang/Sema/Sema.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3471,8 +3471,6 @@ class Sema final {
34713471
EnforceTCBLeafAttr *mergeEnforceTCBLeafAttr(Decl *D,
34723472
const EnforceTCBLeafAttr &AL);
34733473

3474-
SYCLIntelLoopFuseAttr *
3475-
mergeSYCLIntelLoopFuseAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E);
34763474
void mergeDeclAttributes(NamedDecl *New, Decl *Old,
34773475
AvailabilityMergeKind AMK = AMK_Redeclaration);
34783476
void MergeTypedefNameDecl(Scope *S, TypedefNameDecl *New,
@@ -10232,6 +10230,10 @@ class Sema final {
1023210230
Expr *E);
1023310231
SYCLIntelNoGlobalWorkOffsetAttr *MergeSYCLIntelNoGlobalWorkOffsetAttr(
1023410232
Decl *D, const SYCLIntelNoGlobalWorkOffsetAttr &A);
10233+
void AddSYCLIntelLoopFuseAttr(Decl *D, const AttributeCommonInfo &CI,
10234+
Expr *E);
10235+
SYCLIntelLoopFuseAttr *
10236+
MergeSYCLIntelLoopFuseAttr(Decl *D, const SYCLIntelLoopFuseAttr &A);
1023510237

1023610238
/// AddAlignedAttr - Adds an aligned attribute to a particular declaration.
1023710239
void AddAlignedAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E,
@@ -10286,8 +10288,6 @@ class Sema final {
1028610288
/// addSYCLIntelPipeIOAttr - Adds a pipe I/O attribute to a particular
1028710289
/// declaration.
1028810290
void addSYCLIntelPipeIOAttr(Decl *D, const AttributeCommonInfo &CI, Expr *ID);
10289-
void addSYCLIntelLoopFuseAttr(Decl *D, const AttributeCommonInfo &CI,
10290-
Expr *E);
1029110291

1029210292
bool checkNSReturnsRetainedReturnType(SourceLocation loc, QualType type);
1029310293
bool checkAllowedSYCLInitializer(VarDecl *VD,

‎clang/lib/CodeGen/BackendUtil.cpp‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -943,12 +943,9 @@ void EmitAssemblyHelper::EmitAssembly(BackendAction Action,
943943
std::unique_ptr<llvm::ToolOutputFile> ThinLinkOS, DwoOS;
944944

945945
// Eliminate dead arguments from SPIR kernels in SYCL environment.
946-
// 1. Run DAE when LLVM optimizations are applied as well.
947-
// 2. We cannot run DAE for ESIMD since the pointers to SPIR kernel
948-
// functions are saved in !genx.kernels metadata.
949-
// 3. DAE pass temporary guarded under option.
946+
// Run DAE when LLVM optimizations are applied as well.
950947
if (LangOpts.SYCLIsDevice && !CodeGenOpts.DisableLLVMPasses &&
951-
!LangOpts.SYCLExplicitSIMD && LangOpts.EnableDAEInSpirKernels)
948+
LangOpts.EnableDAEInSpirKernels)
952949
PerModulePasses.add(createDeadArgEliminationSYCLPass());
953950

954951
switch (Action) {

‎clang/lib/CodeGen/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -98,5 +98,6 @@ add_clang_library(clangCodeGen
9898
clangBasic
9999
clangFrontend
100100
clangLex
101+
clangSema
101102
clangSerialization
102103
)

‎clang/lib/CodeGen/CodeGenFunction.cpp‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -983,10 +983,11 @@ void CodeGenFunction::StartFunction(GlobalDecl GD, QualType RetTy,
983983

984984
if (getLangOpts().SYCLIsDevice && D) {
985985
if (const auto *A = D->getAttr<SYCLIntelLoopFuseAttr>()) {
986-
Expr *E = A->getValue();
986+
const auto *CE = cast<ConstantExpr>(A->getValue());
987+
Optional<llvm::APSInt> ArgVal = CE->getResultAsAPSInt();
987988
llvm::Metadata *AttrMDArgs[] = {
988-
llvm::ConstantAsMetadata::get(Builder.getInt32(
989-
E->getIntegerConstantExpr(D->getASTContext())->getZExtValue())),
989+
llvm::ConstantAsMetadata::get(
990+
Builder.getInt32(ArgVal->getZExtValue())),
990991
llvm::ConstantAsMetadata::get(
991992
A->isIndependent() ? Builder.getInt32(1) : Builder.getInt32(0))};
992993
Fn->setMetadata("loop_fuse",

‎clang/lib/Frontend/Rewrite/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ add_clang_library(clangRewriteFrontend
1919
clangFrontend
2020
clangLex
2121
clangRewrite
22+
clangSema
2223
clangSerialization
2324

2425
DEPENDS

‎clang/lib/Index/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ add_clang_library(clangIndex
2424
clangFrontend
2525
clangLex
2626
clangRewrite
27+
clangSema
2728
clangSerialization
2829
clangToolingCore
2930

‎clang/lib/Sema/SemaDecl.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2612,8 +2612,8 @@ static bool mergeDeclAttribute(Sema &S, NamedDecl *D,
26122612
NewAttr = S.mergeImportModuleAttr(D, *IMA);
26132613
else if (const auto *INA = dyn_cast<WebAssemblyImportNameAttr>(Attr))
26142614
NewAttr = S.mergeImportNameAttr(D, *INA);
2615-
else if (const auto *LFA = dyn_cast<SYCLIntelLoopFuseAttr>(Attr))
2616-
NewAttr = S.mergeSYCLIntelLoopFuseAttr(D, *LFA, LFA->getValue());
2615+
else if (const auto *A = dyn_cast<SYCLIntelLoopFuseAttr>(Attr))
2616+
NewAttr = S.MergeSYCLIntelLoopFuseAttr(D, *A);
26172617
else if (const auto *TCBA = dyn_cast<EnforceTCBAttr>(Attr))
26182618
NewAttr = S.mergeEnforceTCBAttr(D, *TCBA);
26192619
else if (const auto *TCBLA = dyn_cast<EnforceTCBLeafAttr>(Attr))

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