Enable Loads via LSC

enable loads via LSC

Author: dburke4-intel

IGC/AdaptorCommon/API/igc.h

@@ -51,6 +51,12 @@ enum {
   BIT_CG_DO_SIMD16 = 0b0000000100000000,
 };
 
+enum {
+  LOADS_VIA_LSC_DEFAULT = 0,    // Default based on platform
+  LOADS_VIA_LSC_ENABLE  = 1,    // Force enable loads via LSC (covert to LD_L)
+  LOADS_VIA_LSC_DISABLE = 2,    // Force disable loads via LSC (do not covert to LD_L)
+};
+
 typedef unsigned short CG_CTX_STATS_t;
 
 // shader stat for opt customization

IGC/Compiler/CISACodeGen/Platform.hpp

@@ -1345,5 +1345,9 @@ class CPlatform {
   }
 
   bool allowsMoviForType(VISA_Type type) const { return (type == ISA_TYPE_UD || type == ISA_TYPE_D); }
+
+  bool enableLscSamplerRouting() const {
+      return isCoreChildOf(IGFX_XE3_CORE);
+  }
 };
 } // namespace IGC

IGC/Compiler/SamplerPerfOptPass.cpp

@@ -326,11 +326,14 @@ bool SamplerPerfOptPass::runOnFunction(Function &F) {
           }
         }
         if (SamplerLoadIntrinsic *loadInst = dyn_cast<SamplerLoadIntrinsic>(II)) {
-       // EnableLscSamplerRouting key is true (default)
-       // DisableLscSamplerRouting is from UMD AIL to turn off per shader
-          if (ctx->platform.hasLSCSamplerRouting() && IGC_IS_FLAG_ENABLED(EnableLscSamplerRouting) &&
+          // LscSamplerRouting is from UMD AIL to control per shader
+          const unsigned int umdLscSamplerRouting = ctx->getModuleMetaData()->compOpt.LscSamplerRouting;
+          const IGC::TriboolFlag regKeyValue = static_cast<IGC::TriboolFlag>(IGC_GET_FLAG_VALUE(EnableLscSamplerRouting));
+          const bool defaultValue = (umdLscSamplerRouting == LOADS_VIA_LSC_DEFAULT) ? ctx->platform.enableLscSamplerRouting() : (umdLscSamplerRouting == LOADS_VIA_LSC_ENABLE);
+          const bool enableLscSamplerRouting = (regKeyValue == IGC::TriboolFlag::Default) ? defaultValue : (regKeyValue == IGC::TriboolFlag::Enabled);
+
+          if (ctx->platform.hasLSCSamplerRouting() && !enableLscSamplerRouting &&
               ctx->m_DriverInfo.supportLscSamplerRouting() &&
-              !ctx->getModuleMetaData()->compOpt.DisableLscSamplerRouting &&
               loadInst->getIntrinsicID() == GenISAIntrinsic::GenISA_ldptr) {
             changed = ConvertLdToLdl(loadInst);
           }

IGC/common/MDFrameWork.h

@@ -502,7 +502,7 @@ enum class ShaderTypeMD
         unsigned FastestS1Options                       = 0;  // FCEXP_NO_EXPRIMENT. Can't access the enum here for some reason.
         bool DisableFastestForWaveIntrinsicsCS          = false;
         bool ForceLinearWalkOnLinearUAV                 = false;
-        bool DisableLscSamplerRouting                   = false;
+        unsigned LscSamplerRouting                      = 0;
         bool UseBarrierControlFlowOptimization          = false;
         bool EnableDynamicRQManagement                  = false;
         bool WaDisablePayloadCoalescing                 = false;

IGC/common/igc_flags.h

@@ -1157,7 +1157,12 @@ DECLARE_IGC_REGKEY(
 DECLARE_IGC_REGKEY(bool, DisableCorrectlyRoundedMacros, false,
                    "Tmp flag to disable correcly rounded macros for BMG+. This flag will be removed in the future.",
                    false)
-DECLARE_IGC_REGKEY(bool, EnableLscSamplerRouting, true, "Enables conversion of LD to LD_L instructions.", false)
+DECLARE_IGC_REGKEY_ENUM(EnableLscSamplerRouting, -1,
+                        "Enables conversion of LD to LD_L instructions. Xe2+"
+                        "-1 - Platform default"
+                        " 0 - Force disable conversion to LD_L. Allow loads via LSC"
+                        " 1 - Force enable conversion to LD_L. Disallow loads via LSC",
+                        TRIBOOL_OPTIONS, false)
 DECLARE_IGC_REGKEY(bool, EnableSIMD16ForXe2, false, "Enable CS SIMD16 for Xe2", false)
 DECLARE_IGC_REGKEY(bool, EnableSIMD16ForNonWaveXe2, true, "Enable CS SIMD16 for Xe2 if the shader doesn't have wave",
                    false)