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CUDA: fix im2col_3d to respect non-contiguous inputs (views) (#15956)
* fix im2col_3d to respect non-contiguous inputs (views) The CUDA 3D im2col kernel computed source addresses assuming compact layout (products of dims), ignoring nb[] strides. This patch switches im2col_3d source indexing to use true strides derived from src1->nb[] (in elements), mirroring the approach used in the 2D CUDA im2col path. Destination indexing is unchanged. * use ggml_element_size() for src strides Co-authored-by: Johannes Gäßler <[email protected]> --------- Co-authored-by: Johannes Gäßler <[email protected]>
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ggml/src/ggml-cuda/im2col.cu

Lines changed: 26 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -122,11 +122,14 @@ static __global__ void im2col_3d_kernel(
122122
int64_t OH_OW, int64_t KD_KH_KW, int64_t ID_IH_IW, int64_t KH_KW, int64_t IH_IW, int64_t IC_ID_IH_IW,
123123
int64_t IC_KD_KH_KW, int64_t OW_KD_KH_KW, int64_t OD_OH_OW_IC_KD_KH_KW, int64_t OH_OW_IC_KD_KH_KW,
124124
int64_t OW_IC_KD_KH_KW, int64_t N_OD_OH, int64_t OD_OH,
125+
int64_t stride_q, int64_t stride_z, int64_t stride_y, int64_t stride_x,
125126
int s0, int s1, int s2, int p0, int p1, int p2, int d0, int d1, int d2) {
126127
const int64_t i = threadIdx.x + blockIdx.x * blockDim.x;
127128
if (i >= IC_KD_KH_KW) {
128129
return;
129130
}
131+
GGML_UNUSED(N); GGML_UNUSED(OC); GGML_UNUSED(OH_OW); GGML_UNUSED(OD); GGML_UNUSED(OW); GGML_UNUSED(KD); GGML_UNUSED(KH);
132+
GGML_UNUSED(ID_IH_IW); GGML_UNUSED(IH_IW); GGML_UNUSED(IC_ID_IH_IW); GGML_UNUSED(OW_KD_KH_KW);
130133

131134
const int64_t iic = i / KD_KH_KW;
132135
const int64_t ikd = (i - iic * KD_KH_KW) / KH_KW;
@@ -148,7 +151,7 @@ static __global__ void im2col_3d_kernel(
148151
if (iih < 0 || iih >= IH || iiw < 0 || iiw >= IW || iid < 0 || iid >= ID) {
149152
dst[offset_dst] = 0.0f;
150153
} else {
151-
const int64_t offset_src = in*IC_ID_IH_IW + iic*ID_IH_IW + iid*IH_IW + iih*IW + iiw;
154+
const int64_t offset_src = ((in * IC + iic) * stride_q) + (iid * stride_z) + (iih * stride_y) + (iiw * stride_x);
152155
dst[offset_dst] = src[offset_src];
153156
}
154157
}
@@ -159,6 +162,7 @@ template <typename T>
159162
static void im2col_3d_cuda(const float * src, T* dst,
160163
int64_t N, int64_t IC, int64_t ID, int64_t IH, int64_t IW, int64_t OC,
161164
int64_t KD, int64_t KH, int64_t KW, int64_t OD, int64_t OH, int64_t OW,
165+
int64_t stride_q, int64_t stride_z, int64_t stride_y, int64_t stride_x,
162166
int s0, int s1, int s2, int p0, int p1, int p2, int d0, int d1, int d2, cudaStream_t stream) {
163167
const int64_t OH_OW = OH*OW;
164168
const int64_t KD_KH_KW = KD*KH*KW;
@@ -179,23 +183,30 @@ static void im2col_3d_cuda(const float * src, T* dst,
179183
OH_OW, KD_KH_KW, ID_IH_IW, KH_KW, IH_IW, IC_ID_IH_IW,
180184
IC_KD_KH_KW, OW_KD_KH_KW, OD_OH_OW_IC_KD_KH_KW,
181185
OH_OW_IC_KD_KH_KW, OW_IC_KD_KH_KW, N_OD_OH, OD_OH,
186+
stride_q, stride_z, stride_y, stride_x,
182187
s0, s1, s2, p0, p1, p2, d0, d1, d2);
183188
}
184189

185190
static void im2col_3d_cuda_f16(const float * src, half * dst,
186191
int64_t N, int64_t IC, int64_t ID, int64_t IH, int64_t IW, int64_t OC,
187192
int64_t KD, int64_t KH, int64_t KW, int64_t OD, int64_t OH, int64_t OW,
193+
int64_t stride_q, int64_t stride_z, int64_t stride_y, int64_t stride_x,
188194
int s0, int s1, int s2, int p0, int p1, int p2, int d0, int d1, int d2, cudaStream_t stream) {
189195

190-
im2col_3d_cuda<half>(src, dst, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW, s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
196+
im2col_3d_cuda<half>(src, dst, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW,
197+
stride_q, stride_z, stride_y, stride_x,
198+
s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
191199
}
192200

193201
static void im2col_3d_cuda_f32(const float * src, float * dst,
194202
int64_t N, int64_t IC, int64_t ID, int64_t IH, int64_t IW, int64_t OC,
195203
int64_t KD, int64_t KH, int64_t KW, int64_t OD, int64_t OH, int64_t OW,
204+
int64_t stride_q, int64_t stride_z, int64_t stride_y, int64_t stride_x,
196205
int s0, int s1, int s2, int p0, int p1, int p2, int d0, int d1, int d2, cudaStream_t stream) {
197206

198-
im2col_3d_cuda<float>(src, dst, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW, s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
207+
im2col_3d_cuda<float>(src, dst, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW,
208+
stride_q, stride_z, stride_y, stride_x,
209+
s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
199210
}
200211

201212
void ggml_cuda_op_im2col_3d(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
@@ -235,9 +246,19 @@ void ggml_cuda_op_im2col_3d(ggml_backend_cuda_context & ctx, ggml_tensor * dst)
235246
const int64_t OH = ne2;
236247
const int64_t OW = ne1;
237248

249+
const size_t es = ggml_element_size(src1);
250+
const int64_t stride_x = src1->nb[0] / es;
251+
const int64_t stride_y = src1->nb[1] / es;
252+
const int64_t stride_z = src1->nb[2] / es;
253+
const int64_t stride_q = src1->nb[3] / es;
254+
238255
if(dst->type == GGML_TYPE_F16) {
239-
im2col_3d_cuda_f16(src1_d, (half *) dst_d, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW, s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
256+
im2col_3d_cuda_f16(src1_d, (half *) dst_d, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW,
257+
stride_q, stride_z, stride_y, stride_x,
258+
s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
240259
} else {
241-
im2col_3d_cuda_f32(src1_d, (float *) dst_d, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW, s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
260+
im2col_3d_cuda_f32(src1_d, (float *) dst_d, N, IC, ID, IH, IW, OC, KD, KH, KW, OD, OH, OW,
261+
stride_q, stride_z, stride_y, stride_x,
262+
s0, s1, s2, p0, p1, p2, d0, d1, d2, stream);
242263
}
243264
}

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