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Address Review Comments - 3
* remove hard-coded s390_vr16 to allocate a temp_reg instead * omit move incase ins->sreg and ins->dreg
1 parent ca450d2 commit b802d1b

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4 files changed

+82
-103
lines changed

4 files changed

+82
-103
lines changed

src/mono/mono/mini/cpu-s390x.mdesc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -522,7 +522,7 @@ s390_vx: dest:x src1:x src2:x len:6
522522
s390_vo: dest:x src1:x src2:x len:6
523523
s390_vno: dest:x src1:x src2:x len:6
524524
s390_vn: dest:x src1:x src2:x len:6
525-
vandnot: dest:x src1:x src2:x len:6
525+
vector_andnot: dest:x src1:x src2:x len:6
526526
s390_vnn: dest:x src1:x src2:x len:6
527527
s390_vmlb: dest:x src1:x src2:x len:6
528528
s390_vmlhw: dest:x src1:x src2:x len:6

src/mono/mono/mini/mini-ops.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,6 @@ MINI_OP(OP_STORER8_MEMBASE_REG, "storer8_membase_reg", IREG, FREG, NONE)
121121

122122
#if defined(TARGET_X86) || defined(TARGET_AMD64)
123123
MINI_OP(OP_STOREX_MEMBASE_REG, "storex_membase_reg", IREG, XREG, NONE)
124-
MINI_OP(OP_STOREX_ALIGNED_MEMBASE_REG, "storex_aligned_membase_reg", IREG, XREG, NONE)
125124
MINI_OP(OP_STOREX_NTA_MEMBASE_REG, "storex_nta_membase_reg", IREG, XREG, NONE)
126125
#endif
127126

@@ -1629,7 +1628,6 @@ MINI_OP(OP_S390_VUPLLH, "s390_vupllh", XREG, XREG, NONE)
16291628
MINI_OP(OP_S390_VUPLLF, "s390_vupllf", XREG, XREG, NONE)
16301629
MINI_OP(OP_S390_VFISB, "s390_vfidb", XREG, XREG, NONE)
16311630
MINI_OP(OP_S390_VFIDB, "s390_vfisb", XREG, XREG, NONE)
1632-
MINI_OP(OP_S390_XEXTRACT, "s390_xextract", IREG, XREG, NONE)
16331631
MINI_OP(OP_S390_XCOMPARE_XEXTRACT, "s390_xcompare_xextract", IREG, XREG, XREG)
16341632
#endif
16351633

@@ -2012,7 +2010,7 @@ MINI_OP(OP_NEGATION, "negate", XREG, XREG, NONE)
20122010
MINI_OP(OP_ONES_COMPLEMENT, "ones_complement", XREG, XREG, NONE)
20132011
/* Select bits from src2/src3 using src1 */
20142012
MINI_OP3(OP_BSL, "bitwise_select", XREG, XREG, XREG, XREG)
2015-
MINI_OP(OP_VECTOR_ANDN, "vandnot", XREG, XREG, XREG)
2013+
MINI_OP(OP_VECTOR_ANDN, "vector_andnot", XREG, XREG, XREG)
20162014
MINI_OP(OP_VECTOR_IABS, "vector_integer_abs", XREG, XREG, NONE)
20172015
#endif
20182016

src/mono/mono/mini/mini-s390x.c

Lines changed: 79 additions & 98 deletions
Original file line numberDiff line numberDiff line change
@@ -2618,9 +2618,9 @@ simd_type_to_negate_op (int t)
26182618
}
26192619
}
26202620

2621-
static int
2621+
static bool
26222622
type_is_float (int t){
2623-
return (t == MONO_TYPE_R4 || t == MONO_TYPE_R8) ? OP_XCOMPARE_FP : OP_XCOMPARE;
2623+
return (t == MONO_TYPE_R4 || t == MONO_TYPE_R8);
26242624
}
26252625

26262626
/**
@@ -2758,16 +2758,11 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
27582758
ins->opcode = GINT_TO_OPCODE (simd_type_to_comp_op (GTMREG_TO_INT (ins->inst_c1)));
27592759
break;
27602760
case CMP_LT:
2761-
temp = ins->sreg1;
2762-
ins->sreg1 = ins->sreg2;
2763-
ins->sreg2 = temp;
2764-
case CMP_GT:
2765-
ins->opcode = GINT_TO_OPCODE (simd_type_to_gt_op (GTMREG_TO_INT (ins->inst_c1)));
2766-
break;
27672761
case CMP_LT_UN:
27682762
temp = ins->sreg1;
27692763
ins->sreg1 = ins->sreg2;
27702764
ins->sreg2 = temp;
2765+
case CMP_GT:
27712766
case CMP_GT_UN:
27722767
ins->opcode = GINT_TO_OPCODE (simd_type_to_gt_op (GTMREG_TO_INT (ins->inst_c1)));
27732768
break;
@@ -2790,86 +2785,68 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
27902785
break;
27912786
}
27922787
case OP_S390_XCOMPARE_XEXTRACT:{
2793-
switch (type_is_float(GTMREG_TO_INT(ins->inst_c1))){
2794-
case OP_XCOMPARE:{
2788+
guint32 temp_reg = alloc_ireg(cfg);
2789+
if (!type_is_float(GTMREG_TO_INT(ins->inst_c1))){
27952790
switch (ins->inst_c0 >> 4){
2796-
case CMP_EQ:
2797-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_comp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2798-
break;
2799-
case CMP_LT:
2800-
case CMP_LT_UN:
2801-
temp = ins->sreg1;
2802-
ins->sreg1 = ins->sreg2;
2803-
ins->sreg2 = temp;
2804-
case CMP_GT:
2791+
case CMP_EQ:
2792+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_comp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), temp_reg, ins->sreg1, ins->sreg2);
2793+
break;
2794+
case CMP_LT:
2795+
case CMP_LT_UN:
2796+
case CMP_GE:
2797+
case CMP_GE_UN:
2798+
temp = ins->sreg1;
2799+
ins->sreg1 = ins->sreg2;
2800+
ins->sreg2 = temp;
2801+
case CMP_GT:
28052802
case CMP_GT_UN:
2806-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_gt_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2807-
break;
2808-
case CMP_GE:
2809-
case CMP_GE_UN:
2810-
temp = ins->sreg1;
2811-
ins->sreg1 = ins->sreg2;
2812-
ins->sreg2 = temp;
2813-
case CMP_LE:
2814-
case CMP_LE_UN:{
2815-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_gt_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2816-
NEW_SIMD_INS (cfg, ins, temp_ins, OP_S390_VNO, s390_vr16, s390_vr16, s390_vr16);
2817-
break;
2818-
}
2819-
default:
2820-
g_assert_not_reached ();
2821-
break;
2822-
}
2823-
break;
2803+
case CMP_LE:
2804+
case CMP_LE_UN:
2805+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_gt_any_all_op (GTMREG_TO_INT (ins->inst_c1))), temp_reg, ins->sreg1, ins->sreg2);
2806+
break;
2807+
default:
2808+
g_assert_not_reached ();
2809+
break;
2810+
}
2811+
}
2812+
else {
2813+
switch (ins->inst_c0 >> 4){
2814+
case CMP_EQ:
2815+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_comp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), temp_reg, ins->sreg1, ins->sreg2);
2816+
break;
2817+
case CMP_LT_UN:
2818+
case CMP_LT:
2819+
temp = ins->sreg1;
2820+
ins->sreg1 = ins->sreg2;
2821+
ins->sreg2 = temp;
2822+
case CMP_GT_UN:
2823+
case CMP_GT:
2824+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_gt_any_all_op (GTMREG_TO_INT (ins->inst_c1))), temp_reg, ins->sreg1, ins->sreg2);
2825+
break;
2826+
case CMP_LE_UN:
2827+
case CMP_LE:
2828+
temp = ins->sreg1;
2829+
ins->sreg1 = ins->sreg2;
2830+
ins->sreg2 = temp;
2831+
case CMP_GE_UN:
2832+
case CMP_GE:
2833+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_ge_fp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), temp_reg, ins->sreg1, ins->sreg2);
2834+
break;
2835+
default:
2836+
g_assert_not_reached ();
2837+
break;
2838+
}
28242839
}
2825-
case OP_XCOMPARE_FP:{
2826-
switch (ins->inst_c0 >> 4){
2827-
case CMP_EQ:
2828-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_comp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2829-
break;
2830-
case CMP_LT_UN:
2831-
case CMP_LT:
2832-
temp = ins->sreg1;
2833-
ins->sreg1 = ins->sreg2;
2834-
ins->sreg2 = temp;
2835-
case CMP_GT_UN:
2836-
case CMP_GT:
2837-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_gt_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2838-
break;
2839-
case CMP_LE_UN:
2840-
case CMP_LE:
2841-
temp = ins->sreg1;
2842-
ins->sreg1 = ins->sreg2;
2843-
ins->sreg2 = temp;
2844-
case CMP_GE_UN:
2845-
case CMP_GE:
2846-
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_ge_fp_any_all_op (GTMREG_TO_INT (ins->inst_c1))), s390_vr16, ins->sreg1, ins->sreg2);
2847-
break;
2848-
default:
2849-
g_assert_not_reached ();
2850-
break;
2851-
}
2840+
if(!type_is_float(GTMREG_TO_INT(ins->inst_c1))){
2841+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_extract_int_op (GTMREG_TO_INT (ins->inst_c0 & 0x0f), GTMREG_TO_INT (ins->inst_c0 >> 4))), ins->dreg, -1, -1);
2842+
NULLIFY_INS(ins);
2843+
}
2844+
else {
2845+
NEW_SIMD_INS (cfg, ins, temp_ins, GINT_TO_OPCODE (simd_type_to_extract_fp_op (GTMREG_TO_INT (ins->inst_c0 & 0x0f), GTMREG_TO_INT (ins->inst_c0 >> 4))), ins->dreg, -1, -1);
2846+
NULLIFY_INS(ins);
28522847
}
2853-
break;
2854-
default:
2855-
g_assert_not_reached();
2856-
break;
28572848
}
2858-
switch (type_is_float(GTMREG_TO_INT(ins->inst_c1))){
2859-
case OP_XCOMPARE:
2860-
ins->opcode = GINT_TO_OPCODE (simd_type_to_extract_int_op (GTMREG_TO_INT (ins->inst_c0 & 0x0f), GTMREG_TO_INT (ins->inst_c0 >> 4)));
2861-
break;
2862-
case OP_XCOMPARE_FP:
2863-
ins->opcode = GINT_TO_OPCODE (simd_type_to_extract_fp_op (GTMREG_TO_INT (ins->inst_c0 & 0x0f), GTMREG_TO_INT (ins->inst_c0 >> 4)));
28642849
break;
2865-
default:
2866-
g_assert_not_reached ();
2867-
break;
2868-
}
2869-
/* we don't use a register rather the CC set by the vector compare instructions */
2870-
ins->sreg1 = -1;
2871-
}
2872-
break;
28732850
case OP_VECTOR_IABS:
28742851
ins->opcode = GINT_TO_OPCODE (simd_type_to_abs_op (GTMREG_TO_INT (ins->inst_c1)));
28752852
break;
@@ -5845,19 +5822,23 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
58455822
s390_vfpsosb (code, ins->dreg, ins->sreg1, 0);
58465823
break;
58475824
case OP_INSERT_I1:
5848-
s390_vlr (code, ins->dreg, ins->sreg1);
5825+
if (ins->dreg != ins->sreg1)
5826+
s390_vlr (code, ins->dreg, ins->sreg1);
58495827
s390_vlvgb (code, ins->dreg, ins->sreg2, 0, GTMREG_TO_UINT32 (ins->inst_c0));
58505828
break;
58515829
case OP_INSERT_I2:
5852-
s390_vlr (code, ins->dreg, ins->sreg1);
5830+
if (ins->dreg != ins->sreg1)
5831+
s390_vlr (code, ins->dreg, ins->sreg1);
58535832
s390_vlvgh (code, ins->dreg, ins->sreg2, 0, GTMREG_TO_UINT32 (ins->inst_c0));
58545833
break;
58555834
case OP_INSERT_I4:
5856-
s390_vlr (code, ins->dreg, ins->sreg1);
5835+
if (ins->dreg != ins->sreg1)
5836+
s390_vlr (code, ins->dreg, ins->sreg1);
58575837
s390_vlvgf (code, ins->dreg, ins->sreg2, 0, GTMREG_TO_UINT32 (ins->inst_c0));
58585838
break;
58595839
case OP_INSERT_I8:
5860-
s390_vlr (code, ins->dreg, ins->sreg1);
5840+
if (ins->dreg != ins->sreg1)
5841+
s390_vlr (code, ins->dreg, ins->sreg1);
58615842
s390_vlvgg (code, ins->dreg, ins->sreg2, 0, GTMREG_TO_UINT32 (ins->inst_c0));
58625843
break;
58635844
case OP_INSERT_R4:
@@ -5909,30 +5890,30 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
59095890
s390_ldgr (code, ins->dreg, s390_r13);
59105891
break;
59115892
case OP_EXPAND_I1:
5912-
s390_vlvgb (code, s390_vr16, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5913-
s390_vrepb (code, ins->dreg, s390_vr16, 0);
5893+
s390_vlvgb (code, ins->dreg, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5894+
s390_vrepb (code, ins->dreg, ins->dreg, 0);
59145895
break;
59155896
case OP_EXPAND_I2:
5916-
s390_vlvgh (code, s390_vr16, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5917-
s390_vreph (code, ins->dreg, s390_vr16, 0);
5897+
s390_vlvgh (code, ins->dreg, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5898+
s390_vreph (code, ins->dreg, ins->dreg, 0);
59185899
break;
59195900
case OP_EXPAND_I4:
5920-
s390_vlvgf (code, s390_vr16, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5921-
s390_vrepf (code, ins->dreg, s390_vr16, 0);
5901+
s390_vlvgf (code, ins->dreg, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5902+
s390_vrepf (code, ins->dreg, ins->dreg, 0);
59225903
break;
59235904
case OP_EXPAND_I8:
5924-
s390_vlvgg (code, s390_vr16, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5925-
s390_vrepg (code, ins->dreg, s390_vr16, 0);
5905+
s390_vlvgg (code, ins->dreg, ins->sreg1, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5906+
s390_vrepg (code, ins->dreg, ins->dreg, 0);
59265907
break;
59275908
case OP_EXPAND_R4:
59285909
s390_vlgvf (code, s390_r13, ins->sreg1, 0, 0);
5929-
s390_vlvgf (code, s390_vr16, s390_r13, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5930-
s390_vrepf (code, ins->dreg, s390_vr16, 0);
5910+
s390_vlvgf (code, ins->dreg, s390_r13, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5911+
s390_vrepf (code, ins->dreg, ins->dreg, 0);
59315912
break;
59325913
case OP_EXPAND_R8:
59335914
s390_lgdr (code, s390_r13, ins->sreg1);
5934-
s390_vlvgg (code, s390_vr16, s390_r13, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5935-
s390_vrepg (code, ins->dreg, s390_vr16, 0);
5915+
s390_vlvgg (code, ins->dreg, s390_r13, 0, GTMREG_TO_UINT32 (ins->inst_c0));
5916+
s390_vrepg (code, ins->dreg, ins->dreg, 0);
59365917
break;
59375918
case OP_S390_VPKH:
59385919
s390_vpkh ( code, ins->dreg, ins->sreg1, ins->sreg2);

src/mono/mono/mini/mini-s390x.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,7 @@ struct SeqPointInfo {
151151
/*-----------------------------------------------*/
152152

153153
#define MONO_MAX_XREGS 31
154-
#define MONO_ARCH_CALLEE_XREGS 0xFFFEFFFE
154+
#define MONO_ARCH_CALLEE_XREGS 0xFFFFFFFE
155155
#define MONO_ARCH_CALLEE_SAVED_XREGS 0x0
156156

157157
// Does the ABI have a volatile non-parameter register, so tailcall

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