@@ -9054,10 +9054,10 @@ void CodeGen::genAmd64EmitterUnitTestsSse2()
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}
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/* ****************************************************************************
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- * Unit tests for the AX10.2 instructions.
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+ * Unit tests for the APX instructions.
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*/
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- void CodeGen::genAmd64EmitterUnitTestsAvx10v2 ()
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+ void CodeGen::genAmd64EmitterUnitTestsApx ()
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{
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emitter* theEmitter = GetEmitter ();
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@@ -9272,6 +9272,144 @@ void CodeGen::genAmd64EmitterUnitTestsAvx10v2()
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theEmitter->emitIns_S (INS_not, EA_2BYTE, 0 , 0 );
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}
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+ /* ****************************************************************************
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+ * Unit tests for the AX10.2 instructions.
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+ */
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+
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+ void CodeGen::genAmd64EmitterUnitTestsAvx10v2 ()
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+ {
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+ emitter* theEmitter = GetEmitter ();
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+
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+ genDefineTempLabel (genCreateTempLabel ());
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+
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+ // This test suite needs AVX10.2 enabled.
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+ if (!theEmitter->emitComp ->compIsaSupportedDebugOnly (InstructionSet_AVX10v2))
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+ {
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+ return ;
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+ }
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+
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+ // packed conversion instructions
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+ theEmitter->emitIns_R_R (INS_vcvttps2dqs, EA_4BYTE, REG_XMM0, REG_XMM1); // xmm
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+ theEmitter->emitIns_R_R (INS_vcvttps2dqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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+ theEmitter->emitIns_R_R (INS_vcvttps2dqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+
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+ theEmitter->emitIns_R_R (INS_vcvttps2udqs, EA_4BYTE, REG_XMM0, REG_XMM1);// xmm
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+ theEmitter->emitIns_R_R (INS_vcvttps2udqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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+ theEmitter->emitIns_R_R (INS_vcvttps2udqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+
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+ theEmitter->emitIns_R_R (INS_vcvttpd2qqs, EA_8BYTE, REG_XMM0, REG_XMM1);// xmm
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+ theEmitter->emitIns_R_R (INS_vcvttpd2qqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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+ theEmitter->emitIns_R_R (INS_vcvttpd2qqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+
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+ theEmitter->emitIns_R_R (INS_vcvttpd2uqqs, EA_8BYTE, REG_XMM0, REG_XMM1);// xmm
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+ theEmitter->emitIns_R_R (INS_vcvttpd2uqqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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+ theEmitter->emitIns_R_R (INS_vcvttpd2uqqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+
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+ // scalar conversion instructions
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+ theEmitter->emitIns_R_R (INS_vcvttsd2sis32, EA_8BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttsd2sis64, EA_8BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttsd2usis32, EA_8BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttsd2usis64, EA_8BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttss2sis32, EA_4BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttss2sis64, EA_4BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttss2usis32, EA_4BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttss2usis64, EA_4BYTE, REG_XMM0, REG_XMM1);
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+
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+
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+ // minmax instruction
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxss, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxsd, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxps, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxpd, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxps, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+ theEmitter->emitIns_R_R_R_I (INS_vminmaxpd, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0 );
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+
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+ // VCVT[,T]PS2I[,U]BS
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+ theEmitter->emitIns_R_R (INS_vcvtps2ibs, EA_16BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvtps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvtps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_er_ru);
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+ theEmitter->emitIns_R_R (INS_vcvtps2ibs, EA_64BYTE, REG_XMM0, REG_XMM1);
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+
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+ theEmitter->emitIns_R_R (INS_vcvtps2iubs, EA_16BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvtps2iubs, EA_32BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvtps2iubs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_er_rz);
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+
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+ theEmitter->emitIns_R_R (INS_vcvttps2ibs, EA_16BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_eb_er_rd);
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+ theEmitter->emitIns_R_R (INS_vcvttps2ibs, EA_64BYTE, REG_XMM0, REG_XMM1);
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+
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+ theEmitter->emitIns_R_R (INS_vcvttps2iubs, EA_16BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttps2iubs, EA_32BYTE, REG_XMM0, REG_XMM1);
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+ theEmitter->emitIns_R_R (INS_vcvttps2iubs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_er_ru);
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+ theEmitter->emitIns_R_R (INS_vcvttps2iubs, EA_64BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VPDPW[SU,US,UU]D[,S]
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsud, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsud, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsud, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsuds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsuds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwsuds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusd, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusd, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusd, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwusds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuud, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuud, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuud, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuuds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuuds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpwuuds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ // VPDPB[SU,UU,SS]D[,S]
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssd, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssd, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssd, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbssds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsud, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsud, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsud, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsuds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsuds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbsuds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuud, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuud, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuud, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuuds, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuuds, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+ theEmitter->emitIns_R_R_R (INS_vpdpbuuds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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+
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+ // VMPSADBW
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+ theEmitter->emitIns_R_R_R_I (INS_vmpsadbw, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0 );// zmm
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+
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+ // VCOMXSD
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+ theEmitter->emitIns_R_R (INS_vcomxsd, EA_16BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VCOMXSS
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+ theEmitter->emitIns_R_R (INS_vcomxss, EA_16BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VUCOMXSD
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+ theEmitter->emitIns_R_R (INS_vucomxsd, EA_16BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VUCOMXSS
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+ theEmitter->emitIns_R_R (INS_vucomxss, EA_16BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VMOVD
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+ theEmitter->emitIns_R_R (INS_vmovd, EA_16BYTE, REG_XMM0, REG_XMM1);
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+
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+ // VMOVW
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+ theEmitter->emitIns_R_R (INS_vmovw, EA_16BYTE, REG_XMM0, REG_XMM1);
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+ }
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+
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#endif // defined(DEBUG) && defined(TARGET_AMD64)
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#ifdef PROFILING_SUPPORTED
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